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Old 03-13-2006, 09:41 AM   #1
mboehmer_e3b
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Default Prometheus upgrade delayed

The long awaited Prometheus firmware upgrade (full DMA support, and other improvements) will be delayed...

The new CPLD programs have been reworked completely, due to the necessary changes in the driver software (which is not done by E3B, and which we can only influence to a small degree regarding the time schedule) we are not able to deliver the upgrade yet.

E3B apologizes for the delay. We still are working on this project, which will offer some small surprises for Prometheus users. You won't be disappointed :-)
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Old 03-13-2006, 10:01 AM   #2
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Default Re: Prometheus upgrade delayed

That's ok, you take your time... no hurry at all.



*Crusher runs around in panic* :-D
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Old 03-13-2006, 10:12 AM   #3
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Default Re: Prometheus upgrade delayed

While we wait, can we have a rminder of how boards will be upgraded? Once upon a time there was talk of everyone getting a paralle port widget to do it themselves, but this was long ago and probably won't happen. Do we send it to dealers or to you guys, what is the process now?
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Old 03-13-2006, 12:31 PM   #4
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Default Re: Prometheus upgrade delayed

Do Prometheusus (Prometheii??) have flashable firmware? Or does the actual ROM to be swapped?
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Old 03-13-2006, 12:59 PM   #5
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Default Re: Prometheus upgrade delayed

@odin

Believe that the boards will have to be sent to someone with a programmer for that chip. Not "flashable" afaik.
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Old 03-14-2006, 01:06 AM   #6
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Default Re: Prometheus upgrade delayed

Boards will have to be sent in. The firmware resides directly inside the CPLDs, which can only be reprogrammed by special hardware.

In principile a parallel port widget would be possible, but this requires a) special software to be written for AmigaOS, b) a parallel port widget and c) would mean to lose control over the firmware, as everyone out there could decode and reverse engineer it (there might be some persons around interested in :-)

Moreover, reprogramming the CPLD also involves soldering, as two connectors are missing; this is not a thing to be done by everyone. By accidentially swapping the download files between the two CPLDs you might even cause damages to your hardware.

Details on this will be available when the upgrade is available.

Michael
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Old 03-14-2006, 03:18 AM   #7
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Default Re: Prometheus upgrade delayed

Great to hear that! :-)

Will pseudoDMA (or is it now a real ZorroIII dma card that doesn't require using gfx ram as buffer???) work in OS4/morphOS or only on AmigaOS3?

BTW, are you working with the MorphOS/OS4 team and Chris Hodges in order to make the FlashRam of Romulus/algor more useful (I mean, having the possibility of storing OS4/MOS kernel and some drivers in the flashram)? Do you plan to release native drivers for SubWay/NorWay/Algor/HoghWay for OS4/MorphOS?
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Old 03-14-2006, 05:07 AM   #8
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Default Re: Prometheus upgrade delayed

I've got my prom programmer ready. Now I just need to find that doc for making the cable you sent me long ago :-)

Thanks for the update

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Old 03-15-2006, 08:30 AM   #9
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Default Re: Prometheus upgrade delayed

Quote:
c) would mean to lose control over the firmware, as everyone out there could decode and reverse engineer it (there might be some persons around interested in
While I think that's overly paranoid, people are of course free to be so.

I wouldn't want to try and reverse engineer a design using the FPGA chips I do silicon layout for, and I can get all the internal chip documentation requried to do so. I'd be very suprised if the CPLD internal architecture is completely documented for the public... Someone could directly copy the design and redo the PCB layout, I could see that as a more plausible thing. Maybe CPLDs are easier than FPGAs, but anyone wanting to put that kind of time and effort into such reverse-engineering, especially for something with such a tiny market, and then reverse engineer and make any changes to software, is absolutely crazy IMHO.
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Old 03-16-2006, 12:56 PM   #10
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Default Re: Prometheus upgrade delayed

Quote:
Maybe CPLDs are easier than FPGAs,...
They are ways easier. For CPLDs there is often a list of fuses given by the vendor, so one can (for example) program a GAL22V10 by a simple text editor changing the fuses map.

FPGAs are harder to decode, and for today's FPGAs (like Xilinx Spartan or Virtex) devices it is almost impossible. Especially if they feature AES encryption for their data stream :-)

Don't forget that inside these CPLD designs is quite some knowledge and experience, so I don't want this to be spread. It's not being paranoid...
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