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[AeroMan]

Hi,

I've been analysing the A1200 schematics and I came up with a little doubt.
The FC signals from the 020 are connected to Gayle. Their function is to identify which memory space the processor is trying to access. The question is: Does anybody knows what they are used for in the Amiga ? I can't see a reason to use them

[AeroMan]

No one have a clue ? :-?

[HenryCase]

Do you have a link to the A1200 schematics AeroMan so that we can see this issue ourselves?

[CLS2086]

hum, may it was to check the internal amount of RAM depending if you own the 1 mb or 2 mb chip ram version, or maybe it was to use pcmcia SRAM card extension ;-)

[A6000]

hello all,

I am not a qualified tech guy but from memory the fc pins selected 1 of 5 address spaces, user code, user data, supervisor code, supervisor data and interrupt acknowledge.

I don't know what gayle does, but it probably decodes the interrupt acknowledge signal, also the fc lines are required by the 68881/68882 FPU.

[Zac67]

I know that some Ramsey registers on the A3000 are only accessible while in supervisor mode - probably the same with Gayle here.

@CLS2086: the 020 has nothing to do with the amount of chipram.

@A6000: I'm not into 68k bus protocols any more, but that's very possible.

[koaftder]

Schematics here

[AeroMan]

Zac67 wrote:
I know that some Ramsey registers on the A3000 are only accessible while in supervisor mode - probably the same with Gayle here.

@CLS2086: the 020 has nothing to do with the amount of chipram.

@A6000: I'm not into 68k bus protocols any more, but that's very possible.

This sounds possible... in the schematics, it decodes only the two lower bits, so basically it can detect supervisor and user mode.

Coprocessor may also be a thing, since it has some signals on Gayle.

Thanks for the help to everybody. If someone confirm the answer, please post :-)

[A6000]

I think that all memory in the amiga is user space and that supervisor space is not used at all, although I would be interested to learn where it is documented that custom chip registers use supervisor data space.

BBOAH tells me that gayle implements the IDE interface which must use an interrupt or several, it is possible that gayle could have registers in supervisor space.

I have now dug up a data sheet and checked the truth table of the FC outputs, with only two outputs being decoded, if the two lines are FC2 and FC0, then interrupt acknowledge, user data space and supervisor data space can be decoded.

Sorry if this post seems a little unplanned, it has been edited and added to, several times since I originally posted it.