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[Karlos]

Originally Posted by ChaosLord

We will never know if it works because they took the pins off the 68060. Why would they put pins of awesomeness on 68000 and chop them off on 68060?

Or did they just rename them?

I suspect once they added internal MMUs, their intended use was superceeded.

[ChuckT]

Originally Posted by TheRogue

Let me know what you think. Questions, comments, and suggestions requested! Let's hear what you have to say! Also, if anyone wants to help me name this venture, I'd be glad to hear your suggestions!

I have some ideas for commercial venture. I have some commercial ideas. I would like to talk. Please email me here.

[kolla]

My idea of a project is fairly simple - an ATX sized break-out-board for amiga mother boards, that one can mount in the "window" of ATX cabinets, and with connectors to which one can attach cables that plugs into the motherboards, pluss a few extras, like VGA, HDMI, USB and ethernet. I neeed at least three of them

[kedawa]

I'd like something very simple; a 25pin serial to USB cable to connect my Amiga to a modern computer.

This already kind of exists as two separate cables with a USB<->RS232 adapter in the middle, but I'd rather get something more elegant.
This is something that could easily use the same plastic shell as a parallel<->USB printer adapter, (so there's no need to make any expensive new injection molds), and an existing (and well supported) USB<->RS232 chip.

[persia]

Hardware emulators rather than software emulators....

Originally Posted by gaula92

It's a hardware implementation, not a software emulator.
Since most people understand "emulator" as "software emulator" (ie a software running on top of a native OS emulating other hardware), FPGA implementations are NOT emulators: they run on reconfigurable hardware (programmable logic gate arrays).

[TheRogue]

Hey guys, just a short post as I am busy like crazy with things on this end. I will reply to everyone's messages and comments tomorrow perhaps. For now, I just wanted to announce the blog for this project. You can check it out here:

http://retrologycomputing.blogspot.ca/

If you want to post a comment or two there, feel free!

[wrath of khan]

Bookmarked! I watch with interest to see what you come up with.

[A6000]

I don't know if this has been suggested already, but could you offer a walker style case for those who want to rehouse their A1200, with an 030 card it could offer a taste of what the walker might have been.

[Blinx123]

Just curious but what are the chances of a Micronik style Zorro Busboard for the Amiga 1200, complete with an accelerator slot so people may install Cyberstorm cards into their towerized Amiga 1200s?

I'd also be very much interested in an Amiga tower kit.

Oh yea. And an accelerator board that isn't a freaking 030 or 020. Someone ought to give us new 040s and 060s, if Jens is unable/unwilling to do so.

PS: Had a look on your site and don't really know what to say other than that you strike me as the grandson of Jay Miner. Very talented

[Heiroglyph]

Originally Posted by ChaosLord

That is what they seem to be labeled. I had always assumed that these "banks" were on 020+ but when I went back and reread the book it said 68000 and I didn't believe it until I looked up a Pin diagram of a 68000 and there were the pins.

I had figured that out. It seems they work differently from good old C64 banking out the ROM to get at the RAM underneath. But nevertheless my documentation says they are usable.
All I know is, the first 680x0 Asm book I ever bought (1985?) described this as separate usable banks of RAM that could be wired separately to literal different banks of RAM. But it says you can't use all 8 banks (don't know why, maybe because they were "reserved").

I reread it a few hours ago. Its all in there. It is of course possible that he did not word things quite right or that I am misunderstanding something....

But what is the purpose of the pins on 68000. u r saying they are like for an external MMU to write protect the CODE bank and that would be about it.

I say if the pins exist on an 060 then they can be wired up on the ram card as extra address lines. And the MMU could still do its thing. I don't see any reason why one must conflict with the other.

FC0-FC2 are used for systems that separate user data, user instruction, supervisor data and supervisor instruction into separate memory banks. In theory this expands your capacity and could prevent buffer overflow attacks somewhat like DEP on newer x86.

It's not user accessible though, it's fully controlled by the CPU involuntarily. When it fetches an instruction, those pins would bank select the user instruction bank, then when it fetches the data for that instruction, they toggle to the user data bank. In supervisor mode, it selects the supervisor banks instead.

These are just set by the CPU along with the address strobe, no user intervention is even possible, so the hardware and operating system have to be designed from the beginning to work this way or ignore them and have one big chunk of memory.

By the time the 060 was made it was pretty clear nobody was using them so they just went away.

[Fats]

Originally Posted by Heiroglyph

FC0-FC2 are used for systems that separate user data, user instruction, supervisor data and supervisor instruction into separate memory banks. In theory this expands your capacity and could prevent buffer overflow attacks somewhat like DEP on newer x86.

It's not user accessible though, it's fully controlled by the CPU involuntarily. When it fetches an instruction, those pins would bank select the user instruction bank, then when it fetches the data for that instruction, they toggle to the user data bank. In supervisor mode, it selects the supervisor banks instead.

So how do you load a program from disk then ? Because during load the CPU considers it as data but during execution as instructions.
So I think you external DMA hardware that is then also aware of the user data/instruction data split.

greets,
Staf.

[commodorejohn]

Originally Posted by Fats

So how do you load a program from disk then ? Because during load the CPU considers it as data but during execution as instructions.
So I think you external DMA hardware that is then also aware of the user data/instruction data split.

Naturally. The organization would work however you want it to work, since you'd be rolling your own MMU (or adapting an existing one) in any case; all the CPU cares about is that it gets instructions when it asks for instructions, and data when it asks for data.

[ChaosLord]

Originally Posted by commodorejohn

Naturally. The organization would work however you want it to work, since you'd be rolling your own MMU (or adapting an existing one) in any case; all the CPU cares about is that it gets instructions when it asks for instructions, and data when it asks for data.

THOR, Phil and others will tell u that on the Amiga there is no clear delineation between code and data.

1. Any data could suddenly be run as code.

2. Any code could suddenly be used as data.

I am sort of morally opposed to #2 but oh well. Ppl do it. They say they have good reasons. C'est la vie.

Legally u can do both as long as u flush the caches correctly. That is the trick.

[commodorejohn]

Yes, but the Amiga was designed around the 68000, not the other way around.