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[Damion]

Should fit into an FPGA pretty easily today and have lots of space left over.

Sounds like an absolutely heinous task. How do you do a new Buster without breaking a million other things that were designed to work around the original's flaws.

I'm no hardware guru, though. Perhaps someone like Michael Boehmer would be willing to share his insight.

[magnetic]

Originally Posted by Damion

I'm no hardware guru, though. Perhaps someone like Michael Boehmer would be willing to share his insight.

Yeah he'd be good to ask, also the Elbox guys. Unfortunately none of these people post here really

[freqmax]

Originally Posted by Damion

Sounds like an absolutely heinous task. How do you do a new Buster without breaking a million other things that were designed to work around the original's flaws.

I'm no hardware guru, though. Perhaps someone like Michael Boehmer would be willing to share his insight.

Seen Minimig? Replay? all using various debug tools. Once you got an FPGA wired as Buster you could use it to debug itself and peripherals.

[billt]

Originally Posted by freqmax

Seen Minimig? Replay? all using various debug tools. Once you got an FPGA wired as Buster you could use it to debug itself and peripherals.

Indeed. Xilinx has Chipscope. Alteras has SignalTap. Open-Source has Sump, Sigrock, OpenVeriFLA, perhaps others. These go inside your FPGA, and may need some on-board memory to buffer what it measures for later analysis, so you don't need a hugely expensive benchtop logic analyzer tool. If something is off-spec, use one of these things to see what is actually happening, and use your engineering imagination to figure out how to deal with that. Something I really wish I had right now is an FPGA board that plugs into a PCI-Express slot and has another PCI-Express slot on top, acting as a man-in-the-middle spy to capture what goes through it for later analysis. Seems that should not be tremendously expensive, yet quite useful.

[Damion]

Well shucks I stand corrected, sounds like it's gonna be be a pretty trivial task for one of you guys to knock it out after all. Had no idea it only takes soaring imagination and a debug tool.

[freqmax]

If you make the hardware (or pay for it) I'm convinced others will take care of the (VHDL) coding side of things. The neat aspect of FPGA is that you can make it look for very specific fault conditions, not just a timing diagram or scope picture. But rather if mode X uses byte A4 bit 5 = 1 THEN "****!". And do that really fast which an oscilloscope operator can't cope with.

[mechy]

Originally Posted by billt

Dave would probably have to try and remember such a thing.

Should fit into an FPGA pretty easily today and have lots of space left over.

Dave Haynie has always been quite responsive to stuff like this. Its worth a try to ask him.

Mech