Apollo A1220, memory map, expanding beyond 4MB?

[RW222]

Hi folks,

Have an Apollo A1220 turbo accelerator for the A1200, has 28Mhz 68020 and 68882, single 72 Pin SIMM socket and jumper for 1MB or 4MB SIMMs.

Now I beleive all the other apollo accelerators were PCMCIA friendly with more than 4MB. Wondering what the odds are that the core logic on this one is similar. Got numerous choices of larger SIMMs hanging around. 8, 16, 32MB, possibly even a 64MB. I realise that 8 and 32 are normally double banked, but I do have a few examples of single bank 8MB SIMMs.

So might it be as simple as hooking another address line up for 16MB support, or what other issues do I face? (back of brain is blabbering something about refresh lines)

Also don't know all that much about the PCMCIA problem, understand that it's memory mapped to somewhere just over where the 5th MB of fast memory would start. However, about the only thing I want to do with the PCMCIA port is run a network card in it, so wondering if I'd have quite the same problems as if it were a storage device. As far as I remember NICs don't generally use DMA, so wondering if that makes a difference or not, and whether a PCMCIA unfriendly memory hack would still leave the PCMCIA slot useful for a NIC. Also would there be any software way to patch it, like making a 64K or whatever chunk unavailable at the right place?

I'm kinda thinking that no more than 4MB will autoconfig, so then I'd have to use one of those "addram" utils to specify where the rest was... in such a case, maybe I'd could just tell it to start above the PCMCIA area...

Anyhoo, hope someone can drop me a clue or two,

RW222

[Stedy]

Hi,

The 680EC020 can only address a 24 bit (16 MByte) address space.

This is the A1200 memory map.

AddressSize
000000 to 1FFFFF 2 MBChip RAM(or system ROM overlay)
200000 to 5FFFFF 4 MBZorro II expansion space
600000 to 9FFFFF 4 MBCredit Card memory if CC present
A00000 to A1FFFF 128 KB Credit Card Attributes
A20000 to A3FFFF 128 KB Credit Card I/O
A40000 to A5FFFF 128 KB Credit Card Bits (similar to CDTV)
A60000 to A7FFFF 128 KB PC I/O
A80000 to B7FFFF 1 MB System ROM selected
B80000 to BEFFFF4 48 KB Not used(Reserved for CDTV)
BF0000 to BFFFFF 64KB 8520CIAs
C00000 to CFFFFF 1 MBC00000 Memory
D00000 to D7FFFF 512 KB PC memory
D80000 to D8FFFF 64 KB SPARE chip select
D90000 to D9FFFF 64 KB ARCNET chip select
DA0000 to DA3FFF 16 KB IDE drive
DA4000 to DA4FFF 16 KB IDE reserved
DA8000 to DAFFFF 32 KB Credit Card and IDE configregisters
DB0000 to DBFFFF 64 KB Not used(reserved for external IDE)
DC0000 to DCFFFF 64 KB Real Time Clock(RTC)
DD0000 to DDFFFF 64 KB RESERVED for DMA controller
DE0000 to DEFFFF 64 KB Not Used
DF0000 to DFFFFF 64 KB Chip Registers
E00000 to E7FFFF 512 KB System ROM(lst half if 1MB ROM)
E80000 to EFFFFF 512 KB Configuration and I/O card space

You will see 2 x 4 MByte slots, one is Zorro II space, which your current 4 MByte SIMM occupies. The other 4 MByte slot is shared with the PCMCIA slot, unfortunately, PCMCIA and another 4 MByte are mutually exclusive.

To access more than 8 MByte of RAM, a 68030 processor is normally used, which can address 4 GByte of RAM and the Extra RAM is mapped outside of the 16 MByte space of the Amiga. I just checked BBoAH, a full 68020 is used on your board but the address decode logic will not support the 32 bit address space required to work outside the PCMCIA space, sorry but without a re-design you can not modify your card.

I hope this provides a reasonable understanding of why.

Ian

[RW222]

Wow, thanks for that, had no idea the memory map was so well stuffed. What it does look like from that though, is that 4MB is reserved purely for a PCMCIA memory sram/flash card. All the rest of the PCMCIA stuff happens above A00000.

Sooo, would that mean that using a peripheral PCMCIA device might still work if I stole another 4MB, or would any ROMs get mapped to that? Though I would assume that that's what "A00000 to A1FFFF 128 KB Credit Card Attributes" is for.

I guess for more than that some shortcuts could be taken with >16MB address decoding, so as not to require too much extra patch logic, but the jumper wiring to the back of the '020 would get hella messy, and end up too noisy to be reliable I would guess. So yup, that sounds like redesign or forget it. Though, I start thinking that I could socket the '020, build an interposer board with the decode logic and 2 SIMM sockets on.... but that wouldn't fit in the trapdoor, that would be an A1200 tower project. If I was doing that, I may as well adapt it for an '030 too or something.... or build a full '030, or '040 board that jams on top of the EC020 with SIMM sockets... (like how the A620 fits) But dunno how effective a homebrew board would be at keeping signals clean enough for high Mhz operation. Guess it miiight be feasible to get a 25Mhz '040 going, have to graverob a quadra or something..

Whoops, detour, backup, so, with a freaky single bank 8MB SIMM, and a little patchwork, would I maybe still be able to use a NIC in the PCMCIA?? (Never found a RAM card that works in the sucker anyway)

edit: another thought, could I maybe figure out something with sticking a 64MB SIMM in it and "wasting" the bottom 16MB, giving me 48MB.